[Intel-gfx] [PATCH] drm/i915: Update write_domains on active list after flush.
daniel at ffwll.ch
Sun Feb 7 15:04:49 CET 2010
On Sun, Feb 07, 2010 at 01:56:51PM +0100, Adam Lantos wrote:
> On Sun, Feb 7, 2010 at 11:26 AM, Daniel Vetter <daniel at ffwll.ch> wrote:
> > What's your hw? I suspect either i8xx or i915G(M) cause they are quite
> > badly fence-reg starved. At least that's the most likely way this code
> > path gets exercised.
> Yes, it's a 915GM.
Just to check: Do you also have
[drm:i915_gem_object_pin] *ERROR* Failure to install fence: -28
right before the crash in your dmesg?
I'll rebase the patch against .32-stable so you can test it asap.
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
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