[Intel-gfx] [PATCH] drm/i915: add dynamic performance control support for Ironlake

[Jesse Barnes]

On Thu, 7 Jan 2010 15:33:14 +0000
Matthew Garrett <mjg59 at srcf.ucam.org> wrote:

> Testing this now. I'm seeing the following in debugfs:
> 
> Starting frequency: P11
> Max frequency: P7
> Min frequency: P13
> 
> Typically, P0 refers to the highest speed a chip can manage. I'm 
> guessing that for this hardware, there's a direct mapping between P 
> states and frequencies and so a given part may only reach a maximum 
> frequency of something some distance from P0? It's only really a 
> cosmetic thing, I guess.

Yeah, the GPU terminology is slightly different here, just to be
confusing.  It'll vary by machine too, on many P0 will be the highest
state.

-- 
Jesse Barnes, Intel Open Source Technology Center