[Intel-gfx] [PATCH 2/7 resend] drm/i915: Configure dither for eDP

[Zhenyu Wang]

From: Zhao Yakui <yakui.zhao at intel.com>

The non-8 BPC can be used for the eDP output device that is
connected through DP-A or DP-D on PCH. In such case we should
set the PIPECONF dither correctly.

Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
Tested-by: Jan-Hendrik Zab <jan at jhz.name>
Signed-off-by: Zhenyu Wang <zhenyuw at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7ffd51c..c757019 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3627,6 +3627,18 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 	/* setup pipeconf */
 	pipeconf = I915_READ(pipeconf_reg);
 
+	/* configure the dither for eDP */
+	if (HAS_PCH_SPLIT(dev) &&
+	    (is_edp || (is_dp && intel_pch_has_edp(crtc)))) {
+		pipeconf &= ~PIPE_DITHER_TYPE_MASK;
+		if ((pipeconf & PIPE_BPC_MASK) != PIPE_8BPC) {
+			pipeconf |= PIPE_ENABLE_DITHER;
+			pipeconf |= PIPE_DITHER_TYPE_ST01;
+		} else {
+			pipeconf &= ~PIPE_ENABLE_DITHER;
+		}
+	}
+
 	/* Set up the display plane register */
 	dspcntr = DISPPLANE_GAMMA_ENABLE;
 
-- 
1.7.0.4