[Intel-gfx] [PATCH] drm/i915: intel hw has only one gpu write domain
eric at anholt.net
Wed Mar 17 14:00:09 PDT 2010
On Sun, 14 Mar 2010 12:18:15 +0100, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> It therefore holds that all objects on the gpu_write_domain are
> in this single write domain. Drop an if checking for the write
> domain in process_flushing_list.
> For some odd reason retire_commands thinks that the sampler cache
> can be written to. Remove this and the assorted logic in do_execbuf.
> Also check that userspace doesn't try to screw us over by claiming
> to write to some strange cache.
> The idea for this patch emerged from a discussion with Chris Wilson.
The intent of the flush_domains in retire_commands was to note that the
read-only sampler cache was flushed and we could clear the read domains
so that a later attempt to use it in the sampler cache wouldn't send out
a new flush.
You've been looking into this stuff more than I have recently -- do you
think that handling that information would be interesting?
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