[Intel-gfx] [PATCH] drm/i915: new blitter ring support from Sandybridge
zhenyuw at linux.intel.com
Tue Oct 12 10:55:31 CEST 2010
On 2010.10.12 09:34:10 +0100, Chris Wilson wrote:
> On Tue, 12 Oct 2010 16:13:51 +0800, Zhenyu Wang <zhenyuw at linux.intel.com> wrote:
> > This adds new ring for blitter engine starting from Sandybridge.
> Thanks, look fairly straightforward. The messy parts are a clear reminder
> that I intended to clean up some areas for multiple rings.
> * bikeshedding
> s/HAS_BLIT_SPLIT/HAS_BLT/ -- the documentation has ingrained BLT engine
> into my head (and I hope they haven't changed on a whim for snb)
ok, BLT looks better.
> After initialisation we should not need to care about HAS_BSD/HAS_BLT and
> just test whether the ring is initialised or active (depending upon op).
> That should dramatically reduce the number of tests in our code and
> hopefully lead to further simplifications.
> Unified request list (along with per-ring lists) will sort out the mess in
> i915_gem_evict and also solve the wrap-around issue.
> So no get/put irq again?
yeah, current still uses user_interrupt, that has been unmasked and enabled
from beginning. I just did some copy&paste, it could be fixed to our original
behavior by mask initially and unmask as required, which might involve irq
enable/disable sequence specific on different hw though.
Open Source Technology Center, Intel ltd.
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