[Intel-gfx] PCH eDP fixes
jbarnes at virtuousgeek.org
Fri Oct 8 09:24:55 PDT 2010
On Fri, 08 Oct 2010 11:00:11 +0100
Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Thu, 7 Oct 2010 16:01:05 -0700, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:
> > Here's the set of PCH eDP fixes I came up with once I received my Sony
> > Vaio. I found a few, non-PCH issues in the process, and took the
> > opportunity to enhance our eDP support to avoid most of the DP training
> > if the VBIOS gives us good data.
> I didn't see how you confirmed that it was good data rather than just
> conservative, power hungry values ;-) Nevertheless, getting eDP to light
> up is a massive step forward on those machines.
I saw you added a new 'valid' bit of some kind for the VBT provided eDP
data; we should check for that in the DP init function if needed.
As for power, the preemphasis and voltage swing levels are just for
training. Using the VBT values is supposedly ideal from the panel and
board's perspective (i.e. the link will be most stable with the
provided values), so we really need to use them even if they cost
slightly more power than a different training scheme. On my test
machine, these values are actually lower than the values arrived at via
full training, so hopefully they're better, power-wise, anyway.
The number of lanes definitely affects power though, but the VBT should
have the minimum number of lanes required to drive the panel at its
native mode (and in fact, some systems may be missing wires for lanes
above this number), so again it should be good from a power perspective.
> Thanks Jesse, and to everyone who tested the various hacks, maybe there is
> some light at the end of the eDP tunnel!
I hope so, sounds like there are still some suspend/resume issues, I'll
take a look at those.
Jesse Barnes, Intel Open Source Technology Center
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