[Intel-gfx] [PATCH] drm/i915: Round-up GTT allocations for unfenced surfaces to the next tile row

[Chris Wilson]

On Fri, 25 Mar 2011 12:16:25 +0000, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> We ensure that an allocated region within the GTT matches the proposed
> usage restrictions. For fenced buffers on old hardware, this means
> rounding up the allocation to the next power of two size and aligning it
> to that size. For unfenced buffers, we need to ensure that the start and
> end of the allocation is aligned to an even tile row.
> 
> v2: Apply the allocation fixup to all devices

I verified that it has no substantial impact on performance of gen4+
devices using cairo-gl/xlib. (Since cairo likes to exercise surface
creation and reuse a lot.)

However, I'm not sure if this truly prevents the corruption on i8xx with
2.14.0. Can somebody break out an old machine and test?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre