[Intel-gfx] [PULL] drm-intel-fixes

[Keith Packard]

Hey Dave:

Here's a pile of fixes to the intel driver. This pull includes the three
patches you already merged in, but it merges cleanly so I didn't rebase
around them.

The following changes since commit 37be944a0270402f9cda291a930b0286f6dc92f5:

  Merge branch 'drm-core-next' of git://people.freedesktop.org/~airlied/linux (2011-10-28 05:54:23 -0700)

are available in the git repository at:

  git://people.freedesktop.org/~keithp/linux drm-intel-fixes

Adam Jackson (1):
      drm/i915: intel_choose_pipe_bpp_dither messages should be DRM_DEBUG_KMS

Ben Widawsky (1):
      drm/i915: forcewake warning fixes in debugfs

Dan Carpenter (1):
      drm/i915: fix if statement (bogus semi-colon)

Daniel Vetter (4):
      drm/i915: disable temporal dithering on the internal panel
      drm/i915: only match on PCI_BASE_CLASS_DISPLAY
      drm/i915: Ivybridge still has fences!
      drm/i915: add constants to size fence arrays and fields

Eric Anholt (3):
      drm/i915: Fix object refcount leak on mmappable size limit error path.
      drm/i915: Turn on a required 3D clock gating bit on Sandybridge.
      drm/i915: Turn on another required clock gating bit on gen6.

Jesse Barnes (1):
      drm/i915: enable cacheable objects on Ivybridge

Keith Packard (12):
      agp: iommu_gfx_mapped only available if CONFIG_INTEL_IOMMU is set
      drm/i915: Use mode_config.mutex in ironlake_panel_vdd_work
      drm/i915: Module parameters using '-1' as default must be signed type
      drm/i915: Move common PCH_PP_CONTROL setup to ironlake_get_pp_control
      drm/i915: Remove link_status field from intel_dp structure
      drm/i915: Treat PCH eDP like DP in most places
      drm/i915: Let panel power sequencing hardware do its job
      drm/i915: Make DP prepare/commit consistent with DP dpms
      drm/i915: Try harder during dp pattern 1 link training
      drm/i915: Remove trailing white space
      drm/i915: Initiate DP link training only on the lanes we'll be using
      drm/i915: Use DPCD value for max DP lanes.

Rakib Mullick (1):
      drm, i915: Fix memory leak in i915_gem_busy_ioctl().

Takashi Iwai (1):
      drm/i915: Fix inconsistent backlight level during disabled

 drivers/char/agp/intel-gtt.c         |    7 +-
 drivers/gpu/drm/i915/i915_debugfs.c  |   57 +++++-
 drivers/gpu/drm/i915/i915_drv.c      |    6 +-
 drivers/gpu/drm/i915/i915_drv.h      |   19 +-
 drivers/gpu/drm/i915/i915_gem.c      |   14 +-
 drivers/gpu/drm/i915/i915_irq.c      |    1 +
 drivers/gpu/drm/i915/i915_reg.h      |   21 ++-
 drivers/gpu/drm/i915/i915_suspend.c  |    2 +
 drivers/gpu/drm/i915/intel_display.c |   33 ++-
 drivers/gpu/drm/i915/intel_dp.c      |  411 +++++++++++++++++++--------------
 drivers/gpu/drm/i915/intel_panel.c   |    3 +-
 11 files changed, 359 insertions(+), 215 deletions(-)

-- 
keith.packard at intel.com
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