[Intel-gfx] [PATCH 14/21] drm/i915: Correct eDP panel power sequencing delay computations

Daniel Vetter daniel at ffwll.ch
Mon Oct 3 12:10:20 CEST 2011


On Sat, Oct 1, 2011 at 21:01, Keith Packard <keithp at keithp.com> wrote:
> On Sat, 1 Oct 2011 11:59:09 +0200, Daniel Vetter <daniel at ffwll.ch> wrote:
>
>> So while you bang your head against this, can you add the backlight power
>> sequencing delays for lvds panels, too? The lvds panel power sequencing
>> should be imo safe - we just msleep-spin with wait_for until the power
>> sequencer has completed the request.
>
> That should be a separate patch set, probably by someone with a
> reasonable range of hardware to actually test it. Somehow I've managed
> to get rid of all of my non-PCH hardware...

Agreed, I've looked a bit at the lvds code and it's quite different,
backlight-wise. Btw, I also see backlight-not-lighting-up issues on
snb, so not only pre-pch-split. I'll look into this when your edp
fixes have settled.
-Daniel
-- 
Daniel Vetter
daniel.vetter at ffwll.ch - +41 (0) 79 364 57 48 - http://blog.ffwll.ch



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