[Intel-gfx] [PATCH] drm/i915: Remove secure batch buffer flag SNB+
daniel at ffwll.ch
Thu Oct 6 04:13:10 PDT 2011
On Wed, Oct 05, 2011 at 10:26:54PM +0100, Chris Wilson wrote:
> On Wed, 5 Oct 2011 13:01:56 -0700, Ben Widawsky <ben at bwidawsk.net> wrote:
> > Docs say that the secure batchbuffer field for > SNB B0 (products that
> > actually shipped) should be 0 when not using PPGTT. I'd guess this has
> > no positive or negative effect, but is just here to jive with the docs.
> How explicit is the warning? Enough to allow arbitrary writes into the
> MMIO space?
I've run this on my snb the past month and couldn't find anything this
unbreaks. Afaics it allows batchbuffers to run a few more MI commands
instead of hanging the gpu with them. But we're not using these from
userspace and they only started to be allowed on snb+ - previous gens
convert them to noops.
Also this allows arbitrary reads/writes to system memory, because with
this batchbuffers can update gtt ptes with MI_UPDATE_GTT.
Even when we find an actual hang this fixes, I think implement ppgtt is
the right thing to do. So
NAKed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
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