[Intel-gfx] [PATCH 2/3] drm/i915: close PM interrupt masking races in the rps work func

Ben Widawsky ben at bwidawsk.net
Mon Sep 5 08:51:52 CEST 2011


On Mon, 5 Sep 2011 08:38:07 +0200
Daniel Vetter <daniel at ffwll.ch> wrote:

> On Sun, Sep 04, 2011 at 09:38:56PM +0000, Ben Widawsky wrote:
> > Oops, you're totally right, I think I meant:
> > -       I915_WRITE(GEN6_PMIMR, pm_imr & ~pm_iir);
> > +       I915_WRITE(GEN6_PMIMR, dev_priv->pm_iir);
> 
> Imo still racy without the irqsafe rps_lock around it. gcc is free to
> compile that into a separate load and store which the irq handler can
> get in between and change dev_priv->pm_iir and PMIMR. The race is now
> only one instruction wide, though ;-)
> -Daniel

You are absolutely correct. The modification to GEN6_PMIMR must be
within the protection of rps_lock.

Ben



More information about the Intel-gfx mailing list