[Intel-gfx] [PATCH 2/2 v2] drm/i915: tracepoints for semaphores

Ben Widawsky ben at bwidawsk.net
Wed Sep 14 04:17:57 CEST 2011


The tracepoints give enough info to figure the updates and compares
(document terminology for signals and waits) and dependencies therein of
the semaphore mailboxes.

Here are arguments to perf to get interesting info (mostly copied from
Chris):
record -f -g -c 1 -e i915:intel_ringbuffer_add_request -e i915:intel_ringbuffer_consume_semaphore -a

Cc: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_trace.h       |   61 +++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_ringbuffer.c |    4 ++
 2 files changed, 65 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index d623fef..493a0d3 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -410,6 +410,67 @@ TRACE_EVENT(i915_reg_rw,
 		     (u32)(__entry->val >> 32))
 );
 
+#define SEMAPHORE_REG_NAME(x) (\
+	(x == RENDER_RING_BASE + 0x40) ? ("RVSYNC") : \
+	((x == RENDER_RING_BASE + 0x44) ? ("RBSYNC") : \
+	((x == GEN6_BSD_RING_BASE + 0x40) ? ("VRSYNC") : \
+	((x == GEN6_BSD_RING_BASE + 0x44) ? ("VBSYNC") : \
+	((x == BLT_RING_BASE + 0x40) ? ("BVSYNC") : \
+	((x == BLT_RING_BASE + 0x44) ? ("BRSYNC") : \
+	("UNKNOWN")))))))
+
+#define RING_NAME(x) (\
+	(x == 1) ? ("rcs") : \
+	((x == 2) ? ("vcs") : \
+	((x == 4) ? ("bcs") : \
+	("unk"))))
+
+TRACE_EVENT(intel_ringbuffer_add_request,
+	    TP_PROTO(struct intel_ring_buffer *ring,
+		     u32 seqno,
+		     u32 reg1,
+		     u32 reg2),
+	    TP_ARGS(ring, seqno, reg1, reg2),
+	    TP_STRUCT__entry(
+			     __field(int, id)
+			     __field(u32, seqno)
+			     __field(u32, reg1)
+			     __field(u32, reg2)
+			    ),
+	    TP_fast_assign(
+			   __entry->id = ring->id;
+			   __entry->seqno = seqno;
+			   __entry->reg1 = reg1;
+			   __entry->reg2 = reg2;
+			  ),
+	    TP_printk("ring = %s, seqno = %u, signal mbox 1 = %s, signal mbox 2 = %s",
+		      RING_NAME(__entry->id), __entry->seqno,
+		      SEMAPHORE_REG_NAME(__entry->reg1),
+		      SEMAPHORE_REG_NAME(__entry->reg2))
+);
+
+TRACE_EVENT(intel_ringbuffer_consume_semaphore,
+	    TP_PROTO(struct intel_ring_buffer *updater,
+		     struct intel_ring_buffer *comparer,
+		     u32 seqno),
+	    TP_ARGS(updater, comparer, seqno),
+	    TP_STRUCT__entry(
+			     __field(int, src)
+			     __field(int, dest)
+			     __field(u32, seqno)
+			    ),
+	    TP_fast_assign(
+			   __entry->src = updater->id;
+			   __entry->dest = comparer->id;
+			   __entry->seqno = seqno;
+			  ),
+	    /* It's not easy to macro the consuming mbox register */
+	    TP_printk("signaller = %s, waiter = %s, seqno = %u",
+		      RING_NAME(__entry->src),
+		      RING_NAME(__entry->dest),
+		      __entry->seqno)
+);
+
 #endif /* _I915_TRACE_H_ */
 
 /* This part must be outside protection */
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 3bac2d5..1395c3c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -359,6 +359,8 @@ gen6_add_request(struct intel_ring_buffer *ring,
 	intel_ring_emit(ring, MI_USER_INTERRUPT);
 	intel_ring_advance(ring);
 
+	trace_intel_ringbuffer_add_request(ring, seqno, mbox1_reg, mbox2_reg);
+
 	return seqno;
 }
 
@@ -419,6 +421,8 @@ intel_ring_sync(struct intel_ring_buffer *waiter,
 	intel_ring_emit(waiter, MI_NOOP);
 	intel_ring_advance(waiter);
 
+	trace_intel_ringbuffer_consume_semaphore(signaller, waiter, seqno);
+
 	return 0;
 }
 
-- 
1.7.6.1




More information about the Intel-gfx mailing list