[Intel-gfx] [PATCH] drm/i915: add missing "break"

[Jesse Barnes]

On Thu, 22 Sep 2011 12:55:22 -0700
Keith Packard <keithp at keithp.com> wrote:

> On Thu, 22 Sep 2011 15:13:42 -0300, przanoni at gmail.com wrote:
> 
> > It seems to be missing from this commit:
> >   "drm/i915: split out PCH refclk update code"
> 
> Oh, this code is missing far more than that. It doesn't deal with the
> LVDS case at all.
> 
> Here's a patch which turns on the right bits of SSC, in the right
> order, for any combination of CPU-eDP, PCH-eDP and LVDS.
> 
> Jesse: you wrote this stuff, can you review what I did? Also, my two
> SNB systems (X220 and MacBook Air) both have a BIOS table that
> disables SSC, is there any reason for us to believe the BIOS table on
> a PCH system? Can't we always use SSC?

I think it depends on the platform.  On some, enabling SSC may actually
create more noise than not for some components (not that I've run the
EMF calculations...).

I don't have this code in my tree though... is this the patch I sent
awhile back?  I thought it broke external outputs too?  The last time
we touched this we broke the dual head case (a config change caused one
head to go blank), did you test that?

What I don't understand about the refclk code is that we should be able
to leave everything enabled and just select the right clock source in
the DPLL_SEL bits.  But that doesn't seem to help the wavy VGA bug,
since in that case I think we're explicitly choosing the non-SSC clock
and we still get waviness.

I *think* the code you changed is ok; just needs lots of testing and
verification that the SSC bits are set like we expect as we change
configurations.  I like the "has_panel" cleanup too; previous versions
of this code had is_lvds || is_edp && pch_edp etc sprinkled all over.

Jesse