[Intel-gfx] [PATCH] drm/i915: add missing "break"
Keith Packard
keithp at keithp.com
Mon Sep 26 22:56:17 CEST 2011
On Fri, 23 Sep 2011 20:07:52 +0100, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Fri, 23 Sep 2011 09:15:05 -0700, Keith Packard <keithp at keithp.com> wrote:
> > What I didn't find there was any mention of the display_clock_mode
> > field; perhaps jbarnes has newer VBIOS sources or actual BDB
> > documentation.
>
> iirc display_clock_mode was found in the Capella VBIOS assembly, so
> indeed comparatively ancient.
Ok, so it appears to have disappeared in more recent hardware. I'm
betting that with PCH hardware, there is always a CK505 source to use,
so the BIOS just uses it unconditionally and may not actually be
configured in the VBT.
> I do enjoy how our best guides for programming the hardware comes from
> RE the bioses. :(
It's not the best, it's just yet another source of information :-)
So, what I think we should be doing is using display_clock_mode to
select between ck505 and internal clock source on pre-PCH hardware. For
PCH hardware, we unconditionally use the ck505 source for the non-SSC
reference. When we need to drive two outputs and are *not* using ck505,
then we disable SSC.
Seem reasonable?
--
keith.packard at intel.com
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