[Intel-gfx] [PATCH 5/5] drm/i915: Always flush tiling changes before accessing through the GTT
daniel at ffwll.ch
Wed Apr 18 01:48:53 PDT 2012
On Sun, Apr 15, 2012 at 12:00:35AM +0200, Daniel Vetter wrote:
> On Sat, Apr 14, 2012 at 09:55:51AM +0100, Chris Wilson wrote:
> > As we defer updating the fence register from set-tiling to the point of
> > use, we need to declare every access through the GTT as either fenced or
> > unfenced.
> > This patches fixes an old bug in the execbuffer relocation processing
> > which could conceivably be hit by a pathological userspace.
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Indeed, my git history digging got lost and given how we upload buffers I
> don't think there's any chance we can hit this, so no i-g-t test
> Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Queued for -next, thanks for the patch.
Mail: daniel at ffwll.ch
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