[Intel-gfx] [PATCH 00/10] gmbus/dp aux irqfication

[Daniel Vetter]

Hi all,

Irq-drive gmbus/dp aux transfer, simply because we can (and at least in the case
of gmbus, it's quite a bit faster than the msleep(1) loop - we now reliably
transfer at full wire speed insteaf of sometimes 2-3x slower).

Compared to the older version I've floated on irc way back and which Chris has
carried around in his wip branchs (and inflicted upon tons of unsuspecting bug
reporters) there are a few differences:
- handle the hpd vs. setup race - even the current code enables hpd processing
  before the fbdev is set up, which is too early.
- fix the gen4 gmbus support, was totally busted.
- tested on hsw (although all the relevant bits are a 100% match with cpt/ivb).
- disable dp aux irq on vlv - too complicated to get at the docs (moved again,
  old access revoked) and I don't have the hw.

While reviewing this patch series I've also noticed two small things in the irq
handling code in general, patches for that at the beginning of the series.

Comment&review highgly welcome.

Cheers, Daniel

Daniel Vetter (10):
  drm/i915: haswell has the same irq handlers as ivb
  drm/i915: don't handle PIPE_LEGACY_BLC_EVENT_STATUS on vlv
  drm/i915: reorder setup sequence to have irqs for output setup
  drm/i915: extract gmbus_wait_hw_status
  drm/i915: wire up gmbus irq handler
  drm/i915: use the gmbus irq for waits
  drm/i915: use gmbus irq to wait for gmbus idle
  drm/i915: wire up do aux channel done interrupt
  drm/i915: irq-drive the dp aux communication
  drm/i915: use _NOTRACE for gmbus/dp aux wait loops

 drivers/gpu/drm/i915/i915_dma.c  |  10 +++-
 drivers/gpu/drm/i915/i915_drv.h  |   8 ++++
 drivers/gpu/drm/i915/i915_irq.c  |  74 ++++++++++++++++++++--------
 drivers/gpu/drm/i915/intel_dp.c  |  59 ++++++++++++++++++-----
 drivers/gpu/drm/i915/intel_i2c.c | 101 +++++++++++++++++++++++++++++----------
 5 files changed, 193 insertions(+), 59 deletions(-)

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1.7.11.7