[Intel-gfx] [PATCH] drm/i915: Reduce memory pressure during shrinker by preallocating swizzle pages

[Daniel Vetter]

On Mon, Dec 03, 2012 at 04:30:59PM +0000, Chris Wilson wrote:
> On a machine with bit17 swizzling, we need to store the bit17 of the
> physical page address in put-pages. This requires a memory allocation,
> on average less than a page, which may be difficult to satisfy is the
> request to put-pages is on behalf of the shrinker. We could allow that
> allocation to pull from the reserved memory pools, but it seems much
> safer to preallocate the array for tiled objects on affected machines.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/i915_gem_tiling.c |   14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
> index 8e59bb5..140ef6b 100644
> --- a/drivers/gpu/drm/i915/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
> @@ -351,6 +351,20 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
>  	/* we have to maintain this existing ABI... */
>  	args->stride = obj->stride;
>  	args->tiling_mode = obj->tiling_mode;
> +
> +	/* Try to preallocate memory required to save swizzling on put-pages */
> +	if (dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17) {
> +		if (obj->tiling_mode) {

i915_gem_object_needs_bit17_swizzle not suitable?
-Daniel

> +			if (obj->bit_17 == NULL) {
> +				obj->bit_17 = kmalloc(BITS_TO_LONGS(obj->base.size >> PAGE_SHIFT) *
> +						      sizeof(long), GFP_KERNEL);
> +			}
> +		} else {
> +			kfree(obj->bit_17);
> +			obj->bit_17 = NULL;
> +		}
> +	}
> +
>  	drm_gem_object_unreference(&obj->base);
>  	mutex_unlock(&dev->struct_mutex);
>  
> -- 
> 1.7.10.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch