[Intel-gfx] [PATCH] drm/i915: add missing SDVO bits for interlaced modes on ILK

[Jesse Barnes]

On Tue, 14 Feb 2012 17:07:09 -0200
Paulo Zanoni <przanoni at gmail.com> wrote:

> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> This was pointed by Jesse Barnes. The code now seems to follow the
> specification but I don't have an SDVO device to really test this.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h      |    1 +
>  drivers/gpu/drm/i915/intel_display.c |    7 ++++++-
>  2 files changed, 7 insertions(+), 1 deletions(-)
> 
> Did someone test interlaced modes with SDVO?
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 5c62b78..52a06be 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3365,6 +3365,7 @@
>  #define  TRANS_INTERLACE_MASK   (7<<21)
>  #define  TRANS_PROGRESSIVE      (0<<21)
>  #define  TRANS_INTERLACED       (3<<21)
> +#define  TRANS_LEGACY_INTERLACED_ILK (2<<21)
>  #define  TRANS_8BPC             (0<<5)
>  #define  TRANS_10BPC            (1<<5)
>  #define  TRANS_6BPC             (2<<5)
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index db7ccbb..3c8a332 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1267,6 +1267,7 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
>  {
>  	int reg;
>  	u32 val, pipeconf_val;
> +	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
>  
>  	/* PCH only available on ILK+ */
>  	BUG_ON(dev_priv->info->gen < 5);
> @@ -1293,7 +1294,11 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
>  
>  	val &= ~TRANS_INTERLACE_MASK;
>  	if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK)
> -		val |= TRANS_INTERLACED;
> +		if (HAS_PCH_IBX(dev_priv->dev) &&
> +		    intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO))
> +			val |= TRANS_LEGACY_INTERLACED_ILK;
> +		else
> +			val |= TRANS_INTERLACED;
>  	else
>  		val |= TRANS_PROGRESSIVE;
>  

Yep, looks correct.  Thanks Paulo.

Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center
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