[Intel-gfx] [PATCH-v2 1/3] drm/i915: specify vertical timings in frame units for interlaced modes (gen3+)

[Peter Ross]

The I945, I965, IronLake and SandyBridge chipsets expect vertical timings in
frame units, whereas the DRM subsystem uses field units internally for
interlaced modes.

Signed-off-by: Peter Ross <pross at xvid.org>
---
 drivers/gpu/drm/i915/intel_display.c |   14 ++++++++++++++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 2a3f707..992f481 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5316,6 +5316,14 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
 		adjusted_mode->crtc_vblank_end -= 1;
 		adjusted_mode->crtc_vsync_end -= 1;
 		adjusted_mode->crtc_vsync_start -= 1;
+		if (INTEL_INFO(dev)->gen >= 3) {
+			adjusted_mode->crtc_vdisplay *= 2;
+			adjusted_mode->crtc_vtotal *= 2;
+			adjusted_mode->crtc_vblank_start *= 2;
+			adjusted_mode->crtc_vblank_end *= 2;
+			adjusted_mode->crtc_vsync_end *= 2;
+			adjusted_mode->crtc_vsync_start *= 2;
+		}
 	} else
 		pipeconf &= ~PIPECONF_INTERLACE_MASK; /* progressive */
 
@@ -5908,6 +5916,12 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 		adjusted_mode->crtc_vblank_end -= 1;
 		adjusted_mode->crtc_vsync_end -= 1;
 		adjusted_mode->crtc_vsync_start -= 1;
+		adjusted_mode->crtc_vdisplay *= 2;
+		adjusted_mode->crtc_vtotal *= 2;
+		adjusted_mode->crtc_vblank_start *= 2;
+		adjusted_mode->crtc_vblank_end *= 2;
+		adjusted_mode->crtc_vsync_end *= 2;
+		adjusted_mode->crtc_vsync_start *= 2;
 	} else
 		pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */
 
-- 
1.7.5.4

-- Peter
(A907 E02F A6E5 0CD2 34CD 20D2 6760 79C5 AC40 DD6B)
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