[Intel-gfx] [PATCH 3/8] drm/i915: fixup interlaced vertical timings confusion, part 2

[Eugeni Dodonov]

On Sat, Jan 28, 2012 at 11:49, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:

> According to bspec, we need to subtract an additional line from vtotal
> for interlaced modes and vblank_end needs to equal vtotal. All other
> timing fields do not need this special treatment, so kill it.
>
> Bspec says that this is irrespective of whether the interlaced mode
> has an odd or even vtotal, both modes are supported.
>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
>

Reviewed-by: Eugeni Dodonov <eugeni.dodonov at intel.com>

-- 
Eugeni Dodonov
<http://eugeni.dodonov.net/>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20120129/b8a506e9/attachment.html>