[Intel-gfx] [PATCH v5] Support for ns2501-DVO

[Daniel Vetter]

On Thu, Jul 19, 2012 at 09:44:02AM +0200, Thomas Richter wrote:
> Am 18.07.2012 19:59, schrieb Daniel Vetter:
> >
> >Patch queued for -next, with the whitespace fail fixed up - please consult
> >Documentation/CodingStyle and scripts/checkpatch.pl for your next patch
> >submission.
> >
> >I've also looked a bit at your enable_pll quirk and I plan to kill that in
> >some later patches because:
> >- We need to enable pll A unconditionally on i830M, otherwise parts of the
> >   chip will power down that shouldn't. For some strange reason we have the
> >   wrong entry in our quirk table.
> >- Simply enabling the pll without correct register values will hang the
> >   hw. This can happen after e.g. resume.
> 
> Agreed. This "enable" hack is a sledgehammer, unfortunately, I
> haven't had any more precise
> instrument available at the time of writing (I do not know enough on
> the i915 inner workings
> to allow that). I'm not sure it is only the PipeA that needs to be
> enabled to make this working,
> though. I found that the i915 driver includes a workaround list that
> enables pipe A on some models,
> and I seem to remember that I added mine without much success on
> this issue - namely the DVO
> remaining unresponsive.
> 
> >Note that a pretty massive rewrite of the entire i915 modeset code is in
> >the pipeline for 3.7 - consider yourself volunteered to test some neat new
> >code ;-)
> No problem, but please don't expect fast turnaround times here as I
> only have occasional access to the
> machines (one intel R31, and an equally old Fujitsu Siemens whose
> model number I forgot).
> 
> As a side question, have you been able to look into the video
> overlay hang I reported lately? I haven't
> had the time yet to update the i915 driver from the latest
> repository, but the version from three weeks
> ago hung completely when enabling overlays - the one before worked
> at least *once*, and hung the second
> time an overlay was created.

Hm, that could be related to the pipe A quirk - if the pipe A isn't
enabled, we enable it while switching the overlay. But only on i830M, so
this code has a rather high chance of being untested and hence broken.
Unfortunately I have to rebase my modeset rework on top of your dvo
branch, otherwise you don't have much to test. I'll try to get around to
that in the next few days.
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48