[Intel-gfx] [PATCH 1/5] drm/i915: wrap up gt powersave enabling functions

[Eugeni Dodonov]

On 06/24/2012 11:42 AM, Daniel Vetter wrote:
> ... instead of calling each one for each generation indiviudally.
> 
> Notice that we've already managed to be inconsistent, the resume path
> is missing an IS_VLV check. As a nice benefit we can mark all the
> platform specific enable/disable functions as static and hide them in
> intel_pm.c
> 
> Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

I have very similar patch for this as well (for HSW patches to come
somewhat later this week), you beat me on sending it by a few days. So:

Reviewed-by: Eugeni Dodonov <eugeni.dodonov at intel.com>

Just one (actually, two) bikesheds below.

> +void intel_disable_gt_powersave(struct drm_device *dev)
> +{
> +	if (IS_IRONLAKE_M(dev))
> +		ironlake_disable_drps(dev);
> +	if (INTEL_INFO(dev)->gen >= 6 && !IS_VALLEYVIEW(dev))
> +		gen6_disable_rps(dev);
> +}

Just a minor bikeshed on those if loops. Wouldn't it be cleaner to
transform the 2nd if into 'else if'?

> +
> +void intel_enable_gt_powersave(struct drm_device *dev)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +
> +	if (IS_IRONLAKE_M(dev)) {
> +		ironlake_enable_drps(dev);
> +		ironlake_enable_rc6(dev);
> +		intel_init_emon(dev);
> +	}
> +
> +	if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
> +		gen6_enable_rps(dev_priv);
> +		gen6_update_ring_freq(dev_priv);
> +	}
> +}

...and here as well.

Eugeni