[Intel-gfx] [PATCH 08/26] drm/i915: add DPIO read/write functions for ValleyView
eugeni at dodonov.net
Fri Mar 23 10:29:04 PDT 2012
On Thu, Mar 22, 2012 at 18:38, Jesse Barnes <jbarnes at virtuousgeek.org>wrote:
> ValleyView and similar hardware (like CedarView) put some display
> related registers like the PLL controls and dividers on a DPIO bus. Add
> simple indirect register access routines to get to those registers.
> v2: move new wait_for macro to intel_drv.h (Ben)
> fix DPIO_PKT double write (Ben)
> add debugfs file
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
(Also answering danvet's question on one of my patches).
Those dpio read/write routines are very similar to the SBI ones for LPT,
but some subtle registers changes make them different enough not to be
directly reused AFAIK. So I think we'll have to stick with a set of DPIO
and SBI ops for now.
So other that the other Ben's and Chris' comments about this:
Reviewed-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
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