[Intel-gfx] [PATCH 0/5] Rework ironlake_crtc_mode_set V2
przanoni at gmail.com
Thu Sep 20 23:36:02 CEST 2012
From: Paulo Zanoni <paulo.r.zanoni at intel.com>
Here are the missing patches that received review during the last week.
- Patch 0001 is the follow up requested by Daniel on his reply to the previous
- Patch 0002 is just a new version with the comments from Daniel applied.
- Patch 0003 is new, but we can consider it as a sub-set of the previous patch
0007 (extract pch_pll_set from ironlake_crtc_mode_set). This should keep the
order things are executed, while still moving a significant amount of code
away from ironlake_crtc_mode_set.
- Patch 0004 is just like previous patch 0008, but rebased.
- Patch 0005 is a new version of previous patch 0002, but now has the potential
to do some damage on i9xx, so it is the last one. I don't have i9xx machines
to test this, so I think we need to gather a few tested-by stamps on it. We
can also give up breaking i9xx and apply the original version which only
Paulo Zanoni (5):
drm/i915: don't recheck for invalid pipe bpp
drm/i915: extract set_m_n from ironlake_crtc_mode_set
drm/i915: extract compute_dpll from ironlake_crtc_mode_set
drm/i915: remove unused variables from ironlake_crtc_mode_set
drm/i915: extract intel_set_pipe_timings from crtc_mode_set
drivers/gpu/drm/i915/intel_display.c | 335 ++++++++++++++++++----------------
1 file changed, 180 insertions(+), 155 deletions(-)
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