[Intel-gfx] [PATCH 01/11] drm/i915: sprite support for ValleyView v3
Jesse Barnes
jbarnes at virtuousgeek.org
Tue Apr 2 20:12:48 CEST 2013
On Tue, 2 Apr 2013 13:26:47 +0300
Ville Syrjälä <ville.syrjala at linux.intel.com> wrote:
> On Thu, Mar 28, 2013 at 09:55:37AM -0700, Jesse Barnes wrote:
> > No constant alpha yet though, that needs a new ioctl and/or property to
> > get/set.
> >
> > v2: use drm_plane_format_cpp (Ville)
> > fix up vlv_disable_plane, remove IVB bits (Ville)
> > remove error path rework (Ville)
> > fix component order confusion (Ville)
> > clean up platform init (Ville)
> > use compute_offset_xtiled (Ville)
> > v3: fix up more format confusion (Ville)
> > update to new page offset function (Ville)
> >
> > Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> > ---
> > drivers/gpu/drm/i915/i915_dma.c | 4 +
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/i915_reg.h | 57 +++++++++
> > drivers/gpu/drm/i915/intel_display.c | 13 ++-
> > drivers/gpu/drm/i915/intel_drv.h | 3 +-
> > drivers/gpu/drm/i915/intel_sprite.c | 213 ++++++++++++++++++++++++++++++++--
> > 6 files changed, 277 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> > index ebcfe2e..4be58e3 100644
> > --- a/drivers/gpu/drm/i915/i915_dma.c
> > +++ b/drivers/gpu/drm/i915/i915_dma.c
> > @@ -1630,6 +1630,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
> > mutex_init(&dev_priv->rps.hw_lock);
> > mutex_init(&dev_priv->modeset_restore_lock);
> >
> > + dev_priv->num_plane = 1;
> > + if (IS_VALLEYVIEW(dev))
> > + dev_priv->num_plane = 2;
> > +
> > ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes);
> > if (ret)
> > goto out_gem_unload;
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 1657d873..2832cdb 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -914,6 +914,7 @@ typedef struct drm_i915_private {
> > bool enable_hotplug_processing;
> >
> > int num_pch_pll;
> > + int num_plane;
> >
> > unsigned long cfb_size;
> > unsigned int cfb_fb;
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index bceca11..d0f7cb9 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3261,6 +3261,63 @@
> > #define SPRGAMC(pipe) _PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC)
> > #define SPRSURFLIVE(pipe) _PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)
> >
> > +#define _SPACNTR 0x72180
> > +#define SP_ENABLE (1<<31)
> > +#define SP_GEAMMA_ENABLE (1<<30)
> > +#define SP_PIXFORMAT_MASK (0xf<<26)
> > +#define SP_FORMAT_YUV422 (0<<26)
> > +#define SP_FORMAT_BGR565 (5<<26)
> > +#define SP_FORMAT_BGRX8888 (6<<26)
> > +#define SP_FORMAT_BGRA8888 (7<<26)
> > +#define SP_FORMAT_RGBX1010102 (8<<26)
> > +#define SP_FORMAT_RGBA1010102 (9<<26)
> > +#define SP_FORMAT_RGBX8888 (0xe<<26)
> > +#define SP_FORMAT_RGBA8888 (0xf<<26)
> > +#define SP_SOURCE_KEY (1<<22)
> > +#define SP_YUV_BYTE_ORDER_MASK (3<<16)
> > +#define SP_YUV_ORDER_YUYV (0<<16)
> > +#define SP_YUV_ORDER_UYVY (1<<16)
> > +#define SP_YUV_ORDER_YVYU (2<<16)
> > +#define SP_YUV_ORDER_VYUY (3<<16)
> > +#define SP_TILED (1<<10)
> > +#define _SPALINOFF 0x72184
> > +#define _SPASTRIDE 0x72188
> > +#define _SPAPOS 0x7218c
> > +#define _SPASIZE 0x72190
> > +#define _SPAKEYMINVAL 0x72194
> > +#define _SPAKEYMSK 0x72198
> > +#define _SPASURF 0x7219c
> > +#define _SPAKEYMAXVAL 0x721a0
> > +#define _SPATILEOFF 0x721a4
> > +#define _SPACONSTALPHA 0x721a8
> > +#define _SPAGAMC 0x721f4
> > +
> > +#define _SPBCNTR 0x72280
> > +#define _SPBLINOFF 0x72284
> > +#define _SPBSTRIDE 0x72288
> > +#define _SPBPOS 0x7228c
> > +#define _SPBSIZE 0x72290
> > +#define _SPBKEYMINVAL 0x72294
> > +#define _SPBKEYMSK 0x72298
> > +#define _SPBSURF 0x7229c
> > +#define _SPBKEYMAXVAL 0x722a0
> > +#define _SPBTILEOFF 0x722a4
> > +#define _SPBCONSTALPHA 0x722a8
> > +#define _SPBGAMC 0x722f4
> > +
> > +#define SPCNTR(pipe, plane) _PIPE(pipe * 2 + plane, _SPACNTR, _SPBCNTR)
> > +#define SPLINOFF(pipe, plane) _PIPE(pipe * 2 + plane, _SPALINOFF, _SPBLINOFF)
> > +#define SPSTRIDE(pipe, plane) _PIPE(pipe * 2 + plane, _SPASTRIDE, _SPBSTRIDE)
> > +#define SPPOS(pipe, plane) _PIPE(pipe * 2 + plane, _SPAPOS, _SPBPOS)
> > +#define SPSIZE(pipe, plane) _PIPE(pipe * 2 + plane, _SPASIZE, _SPBSIZE)
> > +#define SPKEYMINVAL(pipe, plane) _PIPE(pipe * 2 + plane, _SPAKEYMINVAL, _SPBKEYMINVAL)
> > +#define SPKEYMSK(pipe, plane) _PIPE(pipe * 2 + plane, _SPAKEYMSK, _SPBKEYMSK)
> > +#define SPSURF(pipe, plane) _PIPE(pipe * 2 + plane, _SPASURF, _SPBSURF)
> > +#define SPKEYMAXVAL(pipe, plane) _PIPE(pipe * 2 + plane, _SPAKEYMAXVAL, _SPBKEYMAXVAL)
> > +#define SPTILEOFF(pipe, plane) _PIPE(pipe * 2 + plane, _SPATILEOFF, _SPBTILEOFF)
> > +#define SPCONSTALPHA(pipe, plane) _PIPE(pipe * 2 + plane, _SPACONSTALPHA, _SPBCONSTALPHA)
> > +#define SPGAMC(pipe, plane) _PIPE(pipe * 2 + plane, _SPAGAMC, _SPBGAMC)
> > +
> > /* VBIOS regs */
> > #define VGACNTRL 0x71400
> > # define VGA_DISP_DISABLE (1 << 31)
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 7307974..537cd0f 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -8525,6 +8525,8 @@ int intel_framebuffer_init(struct drm_device *dev,
> > case DRM_FORMAT_C8:
> > case DRM_FORMAT_RGB565:
> > case DRM_FORMAT_XRGB8888:
> > + case DRM_FORMAT_RGBX8888:
> > + case DRM_FORMAT_BGRX8888:
>
> These guys shouldn't be here.
>
> Drop this hunk, and then you get:
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
Fixed, thanks.
--
Jesse Barnes, Intel Open Source Technology Center
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