[Intel-gfx] [PATCH] drm/i915: de-magic the dp train value DDI channel dpio ports

[Daniel Vetter]

This way we can lift the port == C restriction, too!

Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 drivers/gpu/drm/i915/intel_dp.c |   22 ++++++++--------------
 1 file changed, 8 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2743f65..71a0f11 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1532,13 +1532,7 @@ static void vlv_set_vswing_pre_emphasis(struct intel_dp *intel_dp, uint8_t train
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	unsigned long demph_reg_value, preemph_reg_value,
 		      uniqtranscale_reg_value;
-
-	/*
-	 * FIXME: This seems to be for port C or eDP only. Who knows exactly,
-	 * since the register writes are all magic values.
-	 */
-	if (intel_dig_port->port != PORT_C)
-		return;
+	int ddi_channel = intel_dig_port->port - 1;
 
 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {
 	case DP_TRAIN_PRE_EMPHASIS_0:
@@ -1615,13 +1609,13 @@ static void vlv_set_vswing_pre_emphasis(struct intel_dp *intel_dp, uint8_t train
 
 	/* eDP is only on port C */
 	mutex_lock(&dev_priv->dpio_lock);
-	intel_dpio_write(dev_priv, 0x8494, 0x00000000);
-	intel_dpio_write(dev_priv, 0x8490, demph_reg_value);
-	intel_dpio_write(dev_priv, 0x8488, uniqtranscale_reg_value);
-	intel_dpio_write(dev_priv, 0x848c, 0x0C782040);
-	intel_dpio_write(dev_priv, 0x842c, 0x00030000);
-	intel_dpio_write(dev_priv, 0x8424, preemph_reg_value);
-	intel_dpio_write(dev_priv, 0x8494, 0x80000000);
+	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(ddi_channel), 0x00000000);
+	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(ddi_channel), demph_reg_value);
+	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(ddi_channel), uniqtranscale_reg_value);
+	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL3(ddi_channel), 0x0C782040);
+	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER0(ddi_channel), 0x00030000);
+	intel_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(ddi_channel), preemph_reg_value);
+	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(ddi_channel), 0x80000000);
 	mutex_unlock(&dev_priv->dpio_lock);
 }
 
-- 
1.7.10.4