[Intel-gfx] [PULL] drm-intel fixes&leftovers for 3.10

Daniel Vetter daniel at ffwll.ch
Thu Apr 18 23:30:46 CEST 2013


Hi Dave,

As promised a stash of (mostly) fixes. Two pieces of non-fixes included:
- A notch more gtt refactoring from Ben, beating to death with igt in our
  nightly testing.
- Support for display display-less server chips (again from Ben). New hw
  support which is only likely to break itself ;-)

Otherwise just tons of fixes:
- hpd irq storm mitigation from Egbert Eich. Your -next tree already has
  the infrastructure, this here just supplies the logic.
- sdvo hw state check fix from Egbert Eich
- fb cb tune settings for the pch pll clocks on cpt/ppt
- "Bring a bigger gun" coherence workaround for multi-threade, mulit-core
  & thrashing tiled gtt cpu access from Chris.
- Update haswell mPHY code.
- l3$ caching for context objects on ivb/hsw (Chris).
- dp aux refclock fix for haswell (Jani)
- moar overclocking fixes for snb/ivb (Ben)
- ecobits ppgtt pte caching control fixes from Ville
- fence stride check fixes and limit improvements (Ville)
- fix up crtc force restoring, potentially resulting in tons of hw state
  check WARNs
- OOPS fix for NULL derefencing of fb pointers when force-restoring a crtc
  when other crtcs are disabled and the force-restored crtc is _not_ the
  first one.
- Fix pfit disabling on gen2/3.
- Haswell ring freq scaling fixes (Chris).
- backlight init/teardown fix (failed eDP init killed the lvds backlight)
  from Jani
- cpt/ppt fdi polarity fixes from Paulo (should help a lot of the FDI link
  train failures).
- And a bunch of smaller things all over.

Cheers, Daniel

PS: Since I've already split out -next for 3.11, this pull is for the
-fixes branch.

The following changes since commit bae3699182027525d92b97d904578a533264b242:

  drm/i915: info level for simulated gpu hang dmesg notice (2013-04-06 16:07:21 +0200)

are available in the git repository at:

  git://people.freedesktop.org/~danvet/drm-intel drm-intel-fixes

for you to fetch changes up to bd080ee57c2173cefdcadc39c7863a76c249d049:

  drm/i915: fix bpc vs. bpp confusion in intel_crtc_compute_config (2013-04-18 09:43:33 +0200)

----------------------------------------------------------------
Ben Widawsky (20):
      drm/i915: Support PCH no display
      drm/i915: PCH_NOP
      drm/i915: Don't touch South Display when PCH_NOP
      drm/i915: Don't wait for PCH on reset
      drm/i915: Set PCH_NOP
      drm/i915: Add a pipeless ivybridge configuration
      drm/i915: generalize pte vs. register BAR allocation
      drm/i915: Call out GEN6 PTE specificity
      drm/i915: Map registers before GTT init
      drm/i915: random checkpatch fixes
      drm/i915/ppgtt: Set scratch page "globally"
      drm/i915: Conditionally carve out GGTT PDE
      drm/i915: Rework PPGTT init code
      drm/i915: Abstract PPGTT enabling
      drm/i915: NULL aliasing_ppgtt on cleanup
      drm/i915: Allow PPGTT enable to fail
      drm/i915: Better overclock support
      drm/i915: Don't default to overclock max
      drm/i915: Remove stale code
      drm/i915: VLV doesn't have LLC

Chris Wilson (3):
      drm/i915: Workaround incoherence between fences and LLC across multiple CPUs
      drm/i915: Use MLC (l3$) for context objects
      drm/i915: Scale ring, rather than ia, frequency on Haswell

Daniel Vetter (10):
      drm/i915: fix lost FP_CB_TUNE setting for pch plls
      drm/i915: fix FP CB tuning limits for lvds
      drm/i915: set CB tuning also for the reduce clock
      drm/i915: tune down Y tiling scanout warning
      drm/i915: update FDI mPHY setup code
      drm/i915: don't check inconsistent modeset state when force-restoring
      drm/i915: Fixup Oops in the pipe config computation
      drm/i915: Fixup pfit disabling for gen2/3
      drm/i915: move cpu_transcoder to the pipe configuration
      drm/i915: fix bpc vs. bpp confusion in intel_crtc_compute_config

Egbert Eich (6):
      drm/i915: Fix SDVO connector and encoder get_hw_state functions
      drm/i915: Add HPD IRQ storm detection (v5)
      drm/i915: (re)init HPD interrupt storm statistics
      drm/i915: Mask out the HPD irq bits before setting them individually.
      drm/i915: Disable HPD interrupt on pin when irq storm is detected (v3)
      drm/i915: Add Reenable Timer to turn Hotplug Detection back on (v4)

Jani Nikula (2):
      drm/i915: use lower aux clock divider on non-ULT HSW
      drm/i915: ensure single initialization and cleanup of backlight device

Mika Kuoppala (2):
      drm/i915: Return stored value from max freq sysfs entry
      drm/i915: shorten debugfs output simple attributes

Paulo Zanoni (7):
      drm/i915: add intel_using_power_well
      drm/i915: don't touch the PF regs if the power well is down
      drm/i915: remove comment about IVB link training from intel_pm.c
      drm/i915: don't intel_crt_init on any ULT machines
      drm/i915: WARN when LPT-LP is not paired with ULT CPU
      drm/i915: set CPT FDI RX polarity bits based on VBT
      drm/i915: preserve the PBC bits of TRANS_CHICKEN2

Ville Syrjälä (6):
      drm/i915: Add ECOBITS_SNB_BIT
      drm/i915: Set GAC_ECO_BITS register on Gen7+
      drm/i915: Configure GAM_ECOCHK appropriatly for Gen7
      drm/i915: Reject fence stride=0 on gen4+
      drm/i915: Increase max fence pitch limit to 256KB on IVB+
      drm/i915: IVB/HSW have 32 fence register

 drivers/gpu/drm/i915/i915_debugfs.c     |   18 ++-
 drivers/gpu/drm/i915/i915_dma.c         |   67 +++++----
 drivers/gpu/drm/i915/i915_drv.c         |   36 ++++-
 drivers/gpu/drm/i915/i915_drv.h         |   22 ++-
 drivers/gpu/drm/i915/i915_gem.c         |   46 ++++++-
 drivers/gpu/drm/i915/i915_gem_context.c |    7 +
 drivers/gpu/drm/i915/i915_gem_gtt.c     |  184 +++++++++++++------------
 drivers/gpu/drm/i915/i915_gem_tiling.c  |   15 +-
 drivers/gpu/drm/i915/i915_irq.c         |  226 +++++++++++++++++++++++++++----
 drivers/gpu/drm/i915/i915_reg.h         |   21 ++-
 drivers/gpu/drm/i915/i915_sysfs.c       |   11 +-
 drivers/gpu/drm/i915/intel_bios.c       |    9 +-
 drivers/gpu/drm/i915/intel_bios.h       |    4 +-
 drivers/gpu/drm/i915/intel_crt.c        |    6 +-
 drivers/gpu/drm/i915/intel_ddi.c        |    8 +-
 drivers/gpu/drm/i915/intel_display.c    |  170 +++++++++++++++--------
 drivers/gpu/drm/i915/intel_dp.c         |   14 +-
 drivers/gpu/drm/i915/intel_drv.h        |   10 +-
 drivers/gpu/drm/i915/intel_fb.c         |    3 +
 drivers/gpu/drm/i915/intel_hdmi.c       |    7 +-
 drivers/gpu/drm/i915/intel_i2c.c        |    4 +-
 drivers/gpu/drm/i915/intel_lvds.c       |    1 -
 drivers/gpu/drm/i915/intel_panel.c      |    7 +-
 drivers/gpu/drm/i915/intel_pm.c         |   85 +++++++++---
 drivers/gpu/drm/i915/intel_sdvo.c       |   14 +-
 drivers/gpu/drm/i915/intel_tv.c         |    2 +-
 26 files changed, 706 insertions(+), 291 deletions(-)

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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