[Intel-gfx] [PATCH 1/2] drm/i915: Initialize seqno for VECS too

[Daniel Vetter]

On Mon, Aug 12, 2013 at 04:53:03PM -0700, Ben Widawsky wrote:
> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65387
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67198
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Tested-by: lu hua <huax.lu at intel.com> (both bug reports)

Please pimp the commit message as discussion on irc (reply with just the
text is ok). Strictly speaking we initialize the 3rd mbox for the 4th ring
here (which ofc is the vebox one for all rings != vebox). And also please
mention the effects of this bug, i.e. how it blows up.

Thanks, Daniel

> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 10c2aaa..665602f 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1592,6 +1592,8 @@ void intel_ring_init_seqno(struct intel_ring_buffer *ring, u32 seqno)
>  	if (INTEL_INFO(ring->dev)->gen >= 6) {
>  		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
>  		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
> +		if (HAS_VEBOX(ring->dev))
> +			I915_WRITE(RING_SYNC_2(ring->mmio_base), 0);
>  	}
>  
>  	ring->set_seqno(ring, seqno);
> -- 
> 1.8.3.3
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch