[Intel-gfx] [PATCH] drm/i915/eDP: do not write power sequence registers for ghost eDP

[Daniel Vetter]

On Wed, Jan 16, 2013 at 10:53:40AM +0200, Jani Nikula wrote:
> Some machines detect an eDP port even if it's not really there, and eDP
> initialization has a fail path for this. Typically such machines have an
> LVDS display instead. A regression introduced in
> 
> commit 82ed61fa1a4e08d5f9e86fb1b715b50ed678b6ac
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date:   Sat Oct 20 20:57:41 2012 +0200
> 
>     drm/i915: make edp panel power sequence setup more robust
> 
> updated the power sequence registers PCH_PP_ON_DELAYS, PCH_PP_OFF_DELAYS,
> and PCH_PP_DIVISOR also in the ghost eDP case, messing up the LVDS display.
> 
> Split the power sequencer initialization into two, delaying the register
> updates until after we know the eDP is real.
> 
> Note: Keep the PP_CONTROL unlocking in the first part, even if it does not
> update registers, per the commit message of the above mentioned commit.
> 
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=52601
> Reported-and-tested-by: Ryan Coe <ryan at rycomotorsports.com>
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
Picked up for -fixes, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch