[Intel-gfx] [PATCH 08/33] drm/i915: SWF screatch registers need an offset on VLV

[Ville Syrjälä]

On Thu, Jan 24, 2013 at 10:37:28PM +0100, Daniel Vetter wrote:
> On Thu, Jan 24, 2013 at 03:29:33PM +0200, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> It's true that we safe/restore these suckers across suspend/resume, but I
> have no idea why or whether we need to. Since there's no way we'll ever
> support ums on vlv I think we should just try to guard the safe/resume
> code with DRIVER_MODESET checks and drop this chunk here.
> 
> Or too risky?

No idea. I suppose some silly BIOS might assume that some of these regs
retain their contents.

> -Daniel
> 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h | 26 +++++++++++++-------------
> >  1 file changed, 13 insertions(+), 13 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 80f9b6a..87eed0c 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3046,19 +3046,19 @@
> >  		(I915_WRITE((reg), (gfx_addr) | I915_LO_DISPBASE(I915_READ(reg))))
> >  
> >  /* VBIOS flags */
> > -#define SWF00			0x71410
> > -#define SWF01			0x71414
> > -#define SWF02			0x71418
> > -#define SWF03			0x7141c
> > -#define SWF04			0x71420
> > -#define SWF05			0x71424
> > -#define SWF06			0x71428
> > -#define SWF10			0x70410
> > -#define SWF11			0x70414
> > -#define SWF14			0x71420
> > -#define SWF30			0x72414
> > -#define SWF31			0x72418
> > -#define SWF32			0x7241c
> > +#define SWF00			(dev_priv->info->display_mmio_offset + 0x71410)
> > +#define SWF01			(dev_priv->info->display_mmio_offset + 0x71414)
> > +#define SWF02			(dev_priv->info->display_mmio_offset + 0x71418)
> > +#define SWF03			(dev_priv->info->display_mmio_offset + 0x7141c)
> > +#define SWF04			(dev_priv->info->display_mmio_offset + 0x71420)
> > +#define SWF05			(dev_priv->info->display_mmio_offset + 0x71424)
> > +#define SWF06			(dev_priv->info->display_mmio_offset + 0x71428)
> > +#define SWF10			(dev_priv->info->display_mmio_offset + 0x70410)
> > +#define SWF11			(dev_priv->info->display_mmio_offset + 0x70414)
> > +#define SWF14			(dev_priv->info->display_mmio_offset + 0x71420)
> > +#define SWF30			(dev_priv->info->display_mmio_offset + 0x72414)
> > +#define SWF31			(dev_priv->info->display_mmio_offset + 0x72418)
> > +#define SWF32			(dev_priv->info->display_mmio_offset + 0x7241c)
> >  
> >  /* Pipe B */
> >  #define _PIPEBDSL		0x71000
> > -- 
> > 1.7.12.4
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch

-- 
Ville Syrjälä
Intel OTC