[Intel-gfx] [PATCH 3.5/5] drm/i915: Do eLLC detection earlier

[Daniel Vetter]

On Thu, Jul 04, 2013 at 11:42:46AM -0700, Ben Widawsky wrote:
> We need it before we set the pte_encode function pointers, which happens
> really early, in gtt_init.
> 
> The problem with just doing the normal sequence earlier is we don't have
> the ability to use forcewake until after the pte functions have been set
> up.
> 
> Since all solutions are somewhat ugly (barring rewriting all the init
> ordering), I've opted to do the detection really early, and the enabling
> later - since the register to detect doesn't require forcewake.
> 
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>

Looking at patch 3.5 here and patch 3 I think those should be squashed
together. Ok if I do that when applying?
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++
>  drivers/gpu/drm/i915/i915_gem.c |  9 +--------
>  2 files changed, 11 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 0e22142..7eda8ab 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1524,6 +1524,16 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
>  
>  	intel_early_sanitize_regs(dev);
>  
> +	if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1)) {
> +		/* The docs do not explain exactly how the calculation can be
> +		 * made. It is somewhat guessable, but for now, it's always
> +		 * 128MB.
> +		 * NB: We can't write IDICR yet because we do not have gt funcs
> +		 * set up */
> +		dev_priv->ellc_size = 128;
> +		DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
> +	}
> +
>  	ret = i915_gem_gtt_init(dev);
>  	if (ret)
>  		goto put_bridge;
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 2df993d..f9834f2 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4153,15 +4153,8 @@ i915_gem_init_hw(struct drm_device *dev)
>  	if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
>  		return -EIO;
>  
> -	if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1)) {
> +	if (dev_priv->ellc_size)
>  		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
> -		/* The docs do not explain exactly how the calculation can be
> -		 * made. It is somewhat guessable, but for now, it's always
> -		 * 128MB.
> -		 */
> -		dev_priv->ellc_size = 128;
> -		DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
> -	}
>  
>  	if (HAS_PCH_NOP(dev)) {
>  		u32 temp = I915_READ(GEN7_MSG_CTL);
> -- 
> 1.8.3
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch