[Intel-gfx] [PATCH 4/9] drm/i915: don't read or write GEN6_PMIIR on Gen 5

[Mika Kuoppala]

Paulo Zanoni <przanoni at gmail.com> writes:

> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
>
> The register doesn't exist on Gen 5.
>
> v2: Simplify checks since pm_iir is always 0 on Gen 5 (Chris)
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 9167219..c674dc3 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1389,7 +1389,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>  	struct drm_device *dev = (struct drm_device *) arg;
>  	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
>  	int ret = IRQ_NONE;
> -	u32 de_iir, gt_iir, de_ier, pm_iir, sde_ier;
> +	u32 de_iir, gt_iir, de_ier, pm_iir = 0, sde_ier;
>  
>  	atomic_inc(&dev_priv->irq_received);
>  
> @@ -1409,9 +1409,10 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>  
>  	de_iir = I915_READ(DEIIR);
>  	gt_iir = I915_READ(GTIIR);
> -	pm_iir = I915_READ(GEN6_PMIIR);
> +	if (IS_GEN6(dev))
> +		pm_iir = I915_READ(GEN6_PMIIR);
>  
> -	if (de_iir == 0 && gt_iir == 0 && (!IS_GEN6(dev) || pm_iir == 0))
> +	if (de_iir == 0 && gt_iir == 0 && pm_iir == 0)
>  		goto done;
>  
>  	ret = IRQ_HANDLED;
> @@ -1424,12 +1425,13 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>  	if (de_iir)
>  		ilk_display_irq_handler(dev, de_iir);
>  
> -	if (IS_GEN6(dev) && pm_iir & GEN6_PM_RPS_EVENTS)
> +	if (pm_iir & GEN6_PM_RPS_EVENTS)
>  		gen6_rps_irq_handler(dev_priv, pm_iir);
>  
>  	I915_WRITE(GTIIR, gt_iir);
>  	I915_WRITE(DEIIR, de_iir);
> -	I915_WRITE(GEN6_PMIIR, pm_iir);
> +	if (pm_iir)
> +		I915_WRITE(GEN6_PMIIR, pm_iir);
>  
>  done:
>  	I915_WRITE(DEIER, de_ier);
> -- 
> 1.8.1.2
>
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