[Intel-gfx] [PATCH 07/15] drm/i915: reset the IIR registers at preinstall

Paulo Zanoni przanoni at gmail.com
Wed Jul 24 00:33:47 CEST 2013


From: Paulo Zanoni <paulo.r.zanoni at intel.com>

The long-term goal is to make preinstall and uninstall almost the
same thing, so we will be able to call uninstall and then postinstall
if needed.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 35 ++++++++++++++++-------------------
 1 file changed, 16 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 37420b5..400aa63 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -79,16 +79,13 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
 	[HPD_PORT_D] = PORTD_HOTPLUG_INT_STATUS
 };
 
-#define INTEL_IRQ_REG_RESET(type, do_iir) do { \
+#define INTEL_IRQ_REG_RESET(type) do { \
 	I915_WRITE(type##MR, 0xffffffff); \
 	I915_WRITE(type##ER, 0); \
-	POSTING_READ(type##ER); \
-	if (do_iir) { \
+	I915_WRITE(type##IR, 0xffffffff); \
+	if (I915_READ(type##IR)) { \
 		I915_WRITE(type##IR, 0xffffffff); \
-		if (I915_READ(type##IR)) { \
-			I915_WRITE(type##IR, 0xffffffff); \
-			POSTING_READ(type##IR); \
-		} \
+		POSTING_READ(type##IR); \
 	} \
 } while (0)
 
@@ -2024,10 +2021,10 @@ static void gen5_gt_irq_preinstall(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	INTEL_IRQ_REG_RESET(GTI, false);
+	INTEL_IRQ_REG_RESET(GTI);
 
 	if (INTEL_INFO(dev)->gen >= 6)
-		INTEL_IRQ_REG_RESET(GEN6_PMI, false);
+		INTEL_IRQ_REG_RESET(GEN6_PMI);
 }
 
 /* drm_dma.h hooks
@@ -2040,7 +2037,7 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
 
 	I915_WRITE(HWSTAM, 0xeffe);
 
-	INTEL_IRQ_REG_RESET(DEI, false);
+	INTEL_IRQ_REG_RESET(DEI);
 
 	gen5_gt_irq_preinstall(dev);
 
@@ -2072,7 +2069,7 @@ static void valleyview_irq_preinstall(struct drm_device *dev)
 	I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0xffff);
-	INTEL_IRQ_REG_RESET(VLV_I, true);
+	INTEL_IRQ_REG_RESET(VLV_I);
 }
 
 static void ibx_hpd_irq_setup(struct drm_device *dev)
@@ -2282,7 +2279,7 @@ static void valleyview_irq_uninstall(struct drm_device *dev)
 	I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0xffff);
-	INTEL_IRQ_REG_RESET(VLV_I, true);
+	INTEL_IRQ_REG_RESET(VLV_I);
 }
 
 static void ironlake_irq_uninstall(struct drm_device *dev)
@@ -2296,16 +2293,16 @@ static void ironlake_irq_uninstall(struct drm_device *dev)
 
 	I915_WRITE(HWSTAM, 0xffffffff);
 
-	INTEL_IRQ_REG_RESET(DEI, true);
+	INTEL_IRQ_REG_RESET(DEI);
 	if (IS_GEN7(dev))
 		I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
 
-	INTEL_IRQ_REG_RESET(GTI, true);
+	INTEL_IRQ_REG_RESET(GTI);
 
 	if (HAS_PCH_NOP(dev))
 		return;
 
-	INTEL_IRQ_REG_RESET(SDEI, true);
+	INTEL_IRQ_REG_RESET(SDEI);
 	if (HAS_PCH_CPT(dev) || HAS_PCH_LPT(dev))
 		I915_WRITE(SERR_INT, I915_READ(SERR_INT));
 }
@@ -2479,7 +2476,7 @@ static void i915_irq_preinstall(struct drm_device * dev)
 	I915_WRITE16(HWSTAM, 0xeffe);
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0);
-	INTEL_IRQ_REG_RESET(I, false);
+	INTEL_IRQ_REG_RESET(I);
 }
 
 static int i915_irq_postinstall(struct drm_device *dev)
@@ -2678,7 +2675,7 @@ static void i915_irq_uninstall(struct drm_device * dev)
 		I915_WRITE(PIPESTAT(pipe), I915_READ(PIPESTAT(pipe)));
 	}
 
-	INTEL_IRQ_REG_RESET(I, true);
+	INTEL_IRQ_REG_RESET(I);
 }
 
 static void i965_irq_preinstall(struct drm_device * dev)
@@ -2694,7 +2691,7 @@ static void i965_irq_preinstall(struct drm_device * dev)
 	I915_WRITE(HWSTAM, 0xeffe);
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0);
-	INTEL_IRQ_REG_RESET(I, false);
+	INTEL_IRQ_REG_RESET(I);
 }
 
 static int i965_irq_postinstall(struct drm_device *dev)
@@ -2919,7 +2916,7 @@ static void i965_irq_uninstall(struct drm_device * dev)
 	I915_WRITE(HWSTAM, 0xffffffff);
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0);
-	INTEL_IRQ_REG_RESET(I, true);
+	INTEL_IRQ_REG_RESET(I);
 
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe),
-- 
1.8.1.2




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