[Intel-gfx] [PATCH 2/2] drm/i915: Fix VLV sprite register offsets

[Ville Syrjälä]

On Wed, Jun 26, 2013 at 08:44:54PM +0200, Daniel Vetter wrote:
> On Tue, Jun 25, 2013 at 02:16:35PM +0300, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > We forgot to add VLV_DISPLAY_BASE to the VLV sprite registers, which
> > caused the sprites to not work at all.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h | 50 ++++++++++++++++++++---------------------
> >  1 file changed, 25 insertions(+), 25 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 2c3bba5..10ac3d5 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3492,7 +3492,7 @@
> >  #define SPRGAMC(pipe) _PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC)
> >  #define SPRSURFLIVE(pipe) _PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)
> >  
> > -#define _SPACNTR		0x72180
> > +#define _SPACNTR		(VLV_DISPLAY_BASE + 0x72180)
> >  #define   SP_ENABLE			(1<<31)
> >  #define   SP_GEAMMA_ENABLE		(1<<30)
> >  #define   SP_PIXFORMAT_MASK		(0xf<<26)
> > @@ -3511,30 +3511,30 @@
> >  #define   SP_YUV_ORDER_YVYU		(2<<16)
> >  #define   SP_YUV_ORDER_VYUY		(3<<16)
> >  #define   SP_TILED			(1<<10)
> > -#define _SPALINOFF		0x72184
> > -#define _SPASTRIDE		0x72188
> > -#define _SPAPOS			0x7218c
> > -#define _SPASIZE		0x72190
> > -#define _SPAKEYMINVAL		0x72194
> > -#define _SPAKEYMSK		0x72198
> > -#define _SPASURF		0x7219c
> > -#define _SPAKEYMAXVAL		0x721a0
> > -#define _SPATILEOFF		0x721a4
> > -#define _SPACONSTALPHA		0x721a8
> > -#define _SPAGAMC		0x721f4
> > -
> > -#define _SPBCNTR		0x72280
> > -#define _SPBLINOFF		0x72284
> > -#define _SPBSTRIDE		0x72288
> > -#define _SPBPOS			0x7228c
> > -#define _SPBSIZE		0x72290
> > -#define _SPBKEYMINVAL		0x72294
> > -#define _SPBKEYMSK		0x72298
> > -#define _SPBSURF		0x7229c
> > -#define _SPBKEYMAXVAL		0x722a0
> > -#define _SPBTILEOFF		0x722a4
> > -#define _SPBCONSTALPHA		0x722a8
> > -#define _SPBGAMC		0x722f4
> > +#define _SPALINOFF		(VLV_DISPLAY_BASE + 0x72184)
> > +#define _SPASTRIDE		(VLV_DISPLAY_BASE + 0x72188)
> > +#define _SPAPOS			(VLV_DISPLAY_BASE + 0x7218c)
> > +#define _SPASIZE		(VLV_DISPLAY_BASE + 0x72190)
> > +#define _SPAKEYMINVAL		(VLV_DISPLAY_BASE + 0x72194)
> > +#define _SPAKEYMSK		(VLV_DISPLAY_BASE + 0x72198)
> > +#define _SPASURF		(VLV_DISPLAY_BASE + 0x7219c)
> > +#define _SPAKEYMAXVAL		(VLV_DISPLAY_BASE + 0x721a0)
> > +#define _SPATILEOFF		(VLV_DISPLAY_BASE + 0x721a4)
> > +#define _SPACONSTALPHA		(VLV_DISPLAY_BASE + 0x721a8)
> > +#define _SPAGAMC		(VLV_DISPLAY_BASE + 0x721f4)
> > +
> > +#define _SPBCNTR		(VLV_DISPLAY_BASE + 0x72280)
> > +#define _SPBLINOFF		(VLV_DISPLAY_BASE + 0x72284)
> > +#define _SPBSTRIDE		(VLV_DISPLAY_BASE + 0x72288)
> > +#define _SPBPOS			(VLV_DISPLAY_BASE + 0x7228c)
> > +#define _SPBSIZE		(VLV_DISPLAY_BASE + 0x72290)
> > +#define _SPBKEYMINVAL		(VLV_DISPLAY_BASE + 0x72294)
> > +#define _SPBKEYMSK		(VLV_DISPLAY_BASE + 0x72298)
> > +#define _SPBSURF		(VLV_DISPLAY_BASE + 0x7229c)
> > +#define _SPBKEYMAXVAL		(VLV_DISPLAY_BASE + 0x722a0)
> > +#define _SPBTILEOFF		(VLV_DISPLAY_BASE + 0x722a4)
> > +#define _SPBCONSTALPHA		(VLV_DISPLAY_BASE + 0x722a8)
> > +#define _SPBGAMC		(VLV_DISPLAY_BASE + 0x722f4)
> 
> Do we anticipate any unification of these registers anytime soon? I wonder
> whether we should switch to a per-sprite mmio offset just in case.

That's been on my TODO list since the dawn of time, but never got around
to coding a solution I was happy with.

> Anyway since this doesn't make it messier I've merged this patch for now.

For now I'm happy to just get the damn sprites on the screen :)

> -Daniel
> 
> >  
> >  #define SPCNTR(pipe, plane) _PIPE(pipe * 2 + plane, _SPACNTR, _SPBCNTR)
> >  #define SPLINOFF(pipe, plane) _PIPE(pipe * 2 + plane, _SPALINOFF, _SPBLINOFF)
> > -- 
> > 1.8.1.5
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch

-- 
Ville Syrjälä
Intel OTC