[Intel-gfx] [PATCH] DRM/i915: On G45 enable cursor plane briefly after enabling the display plane.

Daniel Vetter daniel at ffwll.ch
Mon Mar 4 17:17:28 CET 2013


On Mon, Mar 04, 2013 at 09:24:38AM -0500, Egbert Eich wrote:
> On G45 some low res modes (800x600 and 1024x768) produce a blank
> screen when the display plane is enabled with with cursor plane
> off.
> Experiments showed that this issue occurred when the following
> conditions were met:
> a. a previous mode had the cursor plane enabled (Xserver).
> b. this mode or the previous one was using self refresh. (Thus
>    the problem was only seen with low res modes).
> The screens lit up as soon as the cursor plane got enabled.
> Therefore the blank screen occurred only in console mode, not
> when running an Xserver.
> It also seemed to be necessary to disable self refresh while briefly
> enabling the cursor plane.
> 
> Signed-off-by: Egbert Eich <eich at suse.com>
> Bugzilla: https://bugs.freedesktop.org/attachment.cgi?bugid=61457
> Acked-by: Chris Wilson <chris at chris-wilson.co.uk>

This w/a is impressive ;-) Applied to -fixes, thanks for the patch.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_display.c |   28 +++++++++++++++++++++++++++-
>  1 files changed, 27 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6eb3882..689cc3a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3593,6 +3593,30 @@ static void intel_crtc_dpms_overlay(struct intel_crtc *intel_crtc, bool enable)
>  	 */
>  }
>  
> +/**
> + * i9xx_fixup_plane - ugly workaround for G45 to fire up the hardware
> + * cursor plane briefly if not already running after enabling the display
> + * plane.
> + * This workaround avoids occasional blank screens when self refresh is
> + * enabled.
> + */
> +static void
> +g4x_fixup_plane(struct drm_i915_private *dev_priv, enum pipe pipe)
> +{
> +	u32 cntl = I915_READ(CURCNTR(pipe));
> +
> +	if ((cntl & CURSOR_MODE) == 0) {
> +		u32 fw_bcl_self = I915_READ(FW_BLC_SELF);
> +
> +		I915_WRITE(FW_BLC_SELF, fw_bcl_self & ~FW_BLC_SELF_EN);
> +		I915_WRITE(CURCNTR(pipe), CURSOR_MODE_64_ARGB_AX);
> +		intel_wait_for_vblank(dev_priv->dev, pipe);
> +		I915_WRITE(CURCNTR(pipe), cntl);
> +		I915_WRITE(CURBASE(pipe), I915_READ(CURBASE(pipe)));
> +		I915_WRITE(FW_BLC_SELF, fw_bcl_self);
> +	}
> +}
> +
>  static void i9xx_crtc_enable(struct drm_crtc *crtc)
>  {
>  	struct drm_device *dev = crtc->dev;
> @@ -3618,6 +3642,8 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
>  
>  	intel_enable_pipe(dev_priv, pipe, false);
>  	intel_enable_plane(dev_priv, plane, pipe);
> +	if (IS_G4X(dev))
> +		g4x_fixup_plane(dev_priv, pipe);
>  
>  	intel_crtc_load_lut(crtc);
>  	intel_update_fbc(dev);
> @@ -6337,7 +6363,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
>  				i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo);
>  		} else
>  			i915_gem_object_unpin(intel_crtc->cursor_bo);
> -		drm_gem_object_unreference(&intel_crtc->cursor_bo->base);
> +			drm_gem_object_unreference(&intel_crtc->cursor_bo->base);
>  	}
>  
>  	mutex_unlock(&dev->struct_mutex);
> -- 
> 1.7.7
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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