[Intel-gfx] [PATCH 03/15] drm/i915: add intel_power_well_is_down

Daniel Vetter daniel at ffwll.ch
Thu Mar 7 00:31:07 CET 2013


On Thu, Mar 07, 2013 at 12:26:23AM +0100, Daniel Vetter wrote:
> On Wed, Mar 06, 2013 at 08:03:10PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> > 
> > It returns true if we're not supposed to touch the registers on the
> > power down well.
> > 
> > For now there's just one caller, but I'm going to add more.
> > 
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c |    4 ++--
> >  drivers/gpu/drm/i915/intel_drv.h     |    1 +
> >  drivers/gpu/drm/i915/intel_pm.c      |   16 ++++++++++++++++
> >  3 files changed, 19 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 502cb28..bd27336 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -1227,8 +1227,8 @@ void assert_pipe(struct drm_i915_private *dev_priv,
> >  	if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
> >  		state = true;
> >  
> > -	if (IS_HASWELL(dev_priv->dev) && cpu_transcoder != TRANSCODER_EDP &&
> > -	    !(I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_ENABLE)) {
> > +	if (intel_power_well_is_down(dev_priv->dev) &&
> 
> The name here feels a bit too generic given that we already have on hsw
> different display c states with different requirements and different
> pieces of hw not working.
> 
> Can't thinkg of anything better than intel_display_power_well_is_down
> though ...

Also maybe make the function assure that the power well is on i.e.
power_well_enabled to avoid double-negation logic in a bunch of places.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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