[Intel-gfx] [PATCH 17/20] drm/i915: don't use plane pipe select on VLV

Ville Syrjälä ville.syrjala at linux.intel.com
Tue Mar 19 12:59:57 CET 2013


On Fri, Mar 08, 2013 at 10:46:00AM -0800, Jesse Barnes wrote:
> Planes are fixed to pipes in VLV.
> 
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c |   12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f1d6404..5e338c6 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1272,7 +1272,7 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv,
>  	int cur_pipe;
>  
>  	/* Planes are fixed to pipes on ILK+ */
> -	if (HAS_PCH_SPLIT(dev_priv->dev)) {
> +	if (HAS_PCH_SPLIT(dev_priv->dev) || IS_VALLEYVIEW(dev_priv->dev)) {
>  		reg = DSPCNTR(pipe);
>  		val = I915_READ(reg);
>  		WARN((val & DISPLAY_PLANE_ENABLE),
> @@ -4872,10 +4872,12 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
>  	/* Set up the display plane register */
>  	dspcntr = DISPPLANE_GAMMA_ENABLE;
>  
> -	if (pipe == 0)
> -		dspcntr &= ~DISPPLANE_SEL_PIPE_MASK;
> -	else
> -		dspcntr |= DISPPLANE_SEL_PIPE_B;
> +	if (!IS_VALLEYVIEW(dev)) {
> +		if (pipe == 0)
> +			dspcntr &= ~DISPPLANE_SEL_PIPE_MASK;
> +		else
> +			dspcntr |= DISPPLANE_SEL_PIPE_B;
> +	}
>  
>  	if (pipe == 0 && INTEL_INFO(dev)->gen < 4) {
>  		/* Enable pixel doubling when the dot clock is > 90% of the (display)
> -- 
> 1.7.10.4
> 
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-- 
Ville Syrjälä
Intel OTC



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