[Intel-gfx] [PATCH 1/4] drm/i915: HSW PM Frequency bits fix

Daniel Vetter daniel at ffwll.ch
Tue Mar 26 09:04:27 CET 2013


On Mon, Mar 25, 2013 at 03:15:04PM -0700, Ben Widawsky wrote:
> On Mon, Mar 25, 2013 at 05:55:49PM -0300, Rodrigo Vivi wrote:
> > According to HSW PM programming guide, frequency bits starts at
> > 24 instead of 25.
> > 
> > v2: Paulo Zanoni noticed that only frequency bits can be set at
> > GEN6_RPNSWREQ. All others are read only.
> > 
> > CC: Ben Widawsky <ben at bwidawsk.net>
> > CC: Paulo Zanoni <paulo.r.zanoni at intel.com
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
> Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
Queued for -next, thanks for the patch.
-Daniel
> -- 
> Ben Widawsky, Intel Open Source Technology Center
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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