[Intel-gfx] [PATCH] drm/i915: Fix pipe CSC post offset calculation

Daniel Vetter daniel at ffwll.ch
Thu Nov 28 22:47:53 CET 2013


On Thu, Nov 28, 2013 at 10:10:38PM +0200, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> We were miscalculating the pipe CSC post offset for the full->limited
> range conversion. The resulting post offset was double what it was
> supposed to be, which caused blacks to come out grey when using
> limited range output on HSW+.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71769
> Cc: stable at vger.kernel.org
> Tested-by: Lauri Mylläri <lauri.myllari at gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Picked up for -fixes, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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