[Intel-gfx] [PATCH 1/3] drm/i915: Export GT config attributes

[jeff.mcgee at intel.com]

From: Jeff McGee <jeff.mcgee at intel.com>

Setup new I915_GETPARAM ioctl entries for slice total, subslice
total, EU total, and threads per EU, so that userspace can query
the kernel for the values of these attributes instead of maintaining
individual lookup tables which must be indexed by PCI ID.

The motivation for this change is that fusing can be used to create
multiple slice, subslice, and EU configuration within the same PCI
ID. CHV is the first such device to do this and thus make an ID-based
lookup table approach unreliable. The best solution is for the kernel
to determine the precise config from fuse registers and share the
required information with userspace. Moving to this approach has the
added benefit of reducing the number of static parameters that
userspace must maintain for current and future devices.

The kernel detection of these values is device-specific and not
included in this patch. Because zero is not a valid value for any of
these parameters, a value of zero is interpreted as unknown for the
device.

For: VIZ-4636
Signed-off-by: Jeff McGee <jeff.mcgee at intel.com>
---
 drivers/gpu/drm/i915/i915_dma.c | 20 ++++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h |  5 +++++
 include/uapi/drm/i915_drm.h     |  4 ++++
 3 files changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 52730ed..a6634e6 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -143,6 +143,26 @@ static int i915_getparam(struct drm_device *dev, void *data,
 	case I915_PARAM_HAS_COHERENT_PHYS_GTT:
 		value = 1;
 		break;
+	case I915_PARAM_SLICE_TOTAL:
+		value = INTEL_INFO(dev)->slice_total;
+		if (!value)
+			return -ENODEV;
+		break;
+	case I915_PARAM_SUBSLICE_TOTAL:
+		value = INTEL_INFO(dev)->subslice_total;
+		if (!value)
+			return -ENODEV;
+		break;
+	case I915_PARAM_EU_TOTAL:
+		value = INTEL_INFO(dev)->eu_total;
+		if (!value)
+			return -ENODEV;
+		break;
+	case I915_PARAM_THREADS_PER_EU:
+		value = INTEL_INFO(dev)->threads_per_eu;
+		if (!value)
+			return -ENODEV;
+		break;
 	default:
 		DRM_DEBUG("Unknown parameter %d\n", param->param);
 		return -EINVAL;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 921e4c5..02afb29 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -653,6 +653,11 @@ struct intel_device_info {
 	int trans_offsets[I915_MAX_TRANSCODERS];
 	int palette_offsets[I915_MAX_PIPES];
 	int cursor_offsets[I915_MAX_PIPES];
+
+	unsigned int slice_total;
+	unsigned int subslice_total;
+	unsigned int eu_total;
+	unsigned int threads_per_eu;
 };
 
 #undef DEFINE_FLAG
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 2502622..5fd37b9 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -341,6 +341,10 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_WT     	 	 27
 #define I915_PARAM_CMD_PARSER_VERSION	 28
 #define I915_PARAM_HAS_COHERENT_PHYS_GTT 29
+#define I915_PARAM_SLICE_TOTAL		 30
+#define I915_PARAM_SUBSLICE_TOTAL	 31
+#define I915_PARAM_EU_TOTAL		 32
+#define I915_PARAM_THREADS_PER_EU	 33
 
 typedef struct drm_i915_getparam {
 	int param;
-- 
2.2.0