[Intel-gfx] [PATCH] drm/i915/vlv: Added write-enable pte bit support

[Eric Anholt]

"Goel, Akash" <akash.goel at intel.com> writes:

>>> What happens when we GTT-mapped write a batchbuffer that had
> previously been silently made RO by the kernel?  Does the CPU take a
> fault?  We tested this particular case, doing the relocation inside
> the Batch buffer, which is mapped to GTT as read-only, from the
> exec-buffer path.  On doing so, there were no faults observed on the
> CPU side.
>  
> Also we don't see any ring hangs, when forcing the GPU to do a write
> access on the buffers marked as RO. Just the writes were getting
> rejected.

Interesting.  Good to know.

So far we've never done self-modifying batches.  If we could do it, we
had some interesting ideas for handling some classes of state updates,
but I think at least at one point the kernel was banning self-modifying
batches.
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