[Intel-gfx] [PATCH v2 0/9] Stage shared dpll config

[Daniel Vetter]

On Wed, Oct 29, 2014 at 11:32:29AM +0200, Ander Conselvan de Oliveira wrote:
> Version 2 of the series with the comments I got so far resolved.
> 
> Ander Conselvan de Oliveira (9):
>   drm/i915: Make *_crtc_mode_set work on new_config
>   drm/i915: Convert shared dpll reference count to a crtc mask
>   drm/i915: Move dpll crtc_mask and hw_state fields into separate struct
>   drm/i915: Add infrastructure for choosing DPLLs before disabling crtcs
>   drm/i915: Covert HSW+ to choose DPLLS before disabling CRTCs
>   drm/i915: Covert ILK-IVB to choose DPLLS before disabling CRTCs
>   drm/i915: Covert remaining platforms to choose DPLLS before disabling
>     CRTCs
>   drm/i915: Remove crtc_mode_set() hook
>   drm/i915: Don't store current shared DPLL in the new pipe_config

Ok, pulled in the entire series with some minor polished interspersed so
that you can blame all bugs on me ;-)

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch