[Intel-gfx] [PATCH 10/10] drm/i915: Enable PSR for Baytrail and Braswell.

R, Durgadoss durgadoss.r at intel.com
Thu Nov 6 19:49:43 CET 2014


>-----Original Message-----
>From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of Rodrigo Vivi
>Sent: Wednesday, October 29, 2014 12:16 AM
>To: intel-gfx at lists.freedesktop.org
>Cc: Vivi, Rodrigo
>Subject: [Intel-gfx] [PATCH 10/10] drm/i915: Enable PSR for Baytrail and Braswell.
>
>This patch is the last in series of VLV/CHV PSR,
>that finnaly enable psr by adding it to HAS_PSR
>and calling the propper enable and disable

s/propper/proper

>functions on the right places.
>
>Although it is still disabled by default.
>
>Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>---
> drivers/gpu/drm/i915/i915_drv.h | 3 ++-
> drivers/gpu/drm/i915/intel_dp.c | 4 ++++
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 6a73803..119977b 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -2184,7 +2184,8 @@ struct drm_i915_cmd_table {
>
> #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
> #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
>-#define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev))
>+#define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev) || \
>+				 IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
> #define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
> 				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev))
> #define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
>diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>index b93eb40..3cddf49 100644
>--- a/drivers/gpu/drm/i915/intel_dp.c
>+++ b/drivers/gpu/drm/i915/intel_dp.c
>@@ -2718,6 +2718,9 @@ static void intel_disable_dp(struct intel_encoder *encoder)
> 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
> 	struct drm_device *dev = encoder->base.dev;
>
>+	if (HAS_PSR(dev) & !HAS_DDI(dev))

I think you really meant an '&&' here.. No ??
[although this may work]

Thanks,
Durga

>+		intel_edp_psr_disable(intel_dp);
>+
> 	/* Make sure the panel is off before trying to change the mode. But also
> 	 * ensure that we have vdd while we switch off the panel. */
> 	intel_edp_panel_vdd_on(intel_dp);
>@@ -2935,6 +2938,7 @@ static void vlv_enable_dp(struct intel_encoder *encoder)
> 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>
> 	intel_edp_backlight_on(intel_dp);
>+	intel_edp_psr_enable(intel_dp);
> }
>
> static void g4x_pre_enable_dp(struct intel_encoder *encoder)
>--
>1.9.3
>
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