[Intel-gfx] [PATCH 2/2] It was identified that in some cases when moving cursor Hardware can do mistake with idle_frame count. So Spec is being updated to use 2 as minimum idle_frames.

Rodrigo Vivi rodrigo.vivi at gmail.com
Sat Nov 8 00:48:09 CET 2014


oh! ugly!

I forgot commit subject. Please ignore these 2 patches

On Fri, Nov 7, 2014 at 2:15 PM, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> v2: Use VBT + 1 as suggested by Arthur. So this patch depends on
> PSR VBT block parsing.
>
> Reference: hsdhsw/4394433
> Cc: Arthur Runyan <arthur.j.runyan at intel.com>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index ceb528f..9f2000b 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2174,7 +2174,12 @@ static void intel_edp_psr_enable_source(struct intel_dp *intel_dp)
>         struct drm_device *dev = dig_port->base.base.dev;
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         uint32_t max_sleep_time = 0x1f;
> -       uint32_t idle_frames = 1;
> +       /* Lately it was identified that depending on panel idle frame count
> +        * calculated at HW can be off by 1. So let's use what came
> +        * from VBT + 1 and at minimum 2 to be on the safe side.
> +        */
> +       uint32_t idle_frames = dev_priv->vbt.psr.idle_frames ?
> +                              dev_priv->vbt.psr.idle_frames + 1 : 2;
>         uint32_t val = 0x0;
>         const uint32_t link_entry_time = EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
>         bool only_standby = false;
> --
> 1.9.3
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br



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