[Intel-gfx] [PATCH 4/4] drm/i915: Change CHV SKU400 GPU freq divider to 10

[Daniel Vetter]

On Tue, Nov 18, 2014 at 02:44:57PM +0530, Deepak S wrote:
> 
> On Tuesday 11 November 2014 02:25 AM, ville.syrjala at linux.intel.com wrote:
> >From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> >According to "Cherryview_GFXclocks_y14w36d1.xlsx" the GPU frequency
> >divider should be 10 in when the CZ clock is 400 MHz. Change the code
> >to agree so that we report the correct frequencies.
> >
> >Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >---
> >  drivers/gpu/drm/i915/intel_pm.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> >index 0f5c391..b73506f 100644
> >--- a/drivers/gpu/drm/i915/intel_pm.c
> >+++ b/drivers/gpu/drm/i915/intel_pm.c
> >@@ -7292,8 +7292,9 @@ static int vlv_gpu_freq_div(unsigned int czclk_freq)
> >  		return 12;
> >  	case 320:
> >  	case 333:
> >-	case 400:
> >  		return 16;
> >+	case 400:
> >+		return 20;
> >  	default:
> >  		return -1;
> >  	}
> 
> right latest spec as div is 20
> 
> Reviewed-by: Deepak S <deepak.s at linux.intel.com>

Merged all from this series except patch 2 about the 2*clock confusion.
Thanks for patches&review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch