[Intel-gfx] [PATCH] drm/i915: Pin tiled objects for L-shaped configs

[Daniel Vetter]

On Thu, Nov 20, 2014 at 08:37:36AM +0000, Chris Wilson wrote:
> On Thu, Nov 20, 2014 at 09:26:30AM +0100, Daniel Vetter wrote:
> > Let's just throw in the towel on this one and take the cheap way out.
> > 
> > Based on a patch from Chris Wilson, but checking for a different bit.
> > Chris' patch checked for even bank layout, this one here for a magic
> > bit. Given the evidence we've gathered (not much) both work I think,
> > but checking for the magic bit might be more accurate.
> > 
> > Anyway, works on my gm45 here.
> > 
> > For paranoi restrict to gen4 (and mobile), since we've only ever seen
> > this on gm45 and i965gm.
> > 
> > Also add some debugfs output so that we can skip the tiled swapping
> > tests properly in these cases.
> > 
> > v2: Clean up the quirk'ed pin count in free_object to avoid upsetting
> > the WARN_ON. Spotted by Chris.
> > 
> > Cc: Chris Wilson <chris at chris-wilson.co.uk>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28813
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45092
> > Signed-off-by: Daniel Vetter <daniel.vetter at intel.com>
> 
> I want to complain about the nearly duplicated repeated checks, but I
> failed to rewrite them compactly. :|
> 
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

Queued for -next, thanks for the review.

> Oh, one more request: can I haz decoded quirks in the error state?

Hm, I haven't ever yet wanted to see them. Not even sure whether this
might be useful here really ...
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch