[Intel-gfx] [PATCH V2] drm/i915: Change order of operations for VLV/CHV to not train DP link before PHYs are ready

[Todd Previte]

V2 changes:
- Moved the intel_dp_enable_port() call out of intel_dp_enable() and placed it 
  before the calls to intel_dp_enable() and vlv_wait_port_ready()
- Cleaned up a spacing issues with the code indents
- Amended the commit message to be under 80 characters per line and expanded
  on the description of what the patch does