[Intel-gfx] [PATCH] drm/i915/skl: Enabling PSR2 SU with frame sync

shuang.he at intel.com shuang.he at intel.com
Wed Apr 1 23:33:13 PDT 2015


Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6095
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -2              270/270              268/270
ILK                 -1              303/303              302/303
SNB                                  304/304              304/304
IVB                                  337/337              337/337
BYT                                  287/287              287/287
HSW                                  361/361              361/361
BDW                                  309/309              309/309
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 PNV  igt at gem_userptr_blits@coherency-sync      CRASH(5)PASS(2)      CRASH(2)
 PNV  igt at gem_tiled_pread_pwrite      FAIL(1)PASS(4)      FAIL(1)PASS(1)
*ILK  igt at kms_flip@blocking-absolute-wf_vblank-interruptible      PASS(2)      DMESG_WARN(1)PASS(1)
(dmesg patch applied)drm:drm_edid_block_valid[drm]]*ERROR*EDID_checksum_is_invalid,remainder_is at EDID checksum is .* remainder is
Note: You need to pay more attention to line start with '*'


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