[Intel-gfx] [PATCH 2/2] drm/i915/skl: Double RC6 WRL always on

[Kamble, Sagar A]

Reviewed-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>

On 12/7/2015 9:59 PM, Mika Kuoppala wrote:
> WaRsDoubleRc6WrlWithCoarsePowerGating should
> be enabled for all Skylakes. Make it so.
>
> Cc: Sagar Arun Kamble <sagar.a.kamble at intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_pm.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 7096c06..8598456 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4673,8 +4673,7 @@ static void gen9_enable_rc6(struct drm_device *dev)
>   	/* 2b: Program RC6 thresholds.*/
>   
>   	/* WaRsDoubleRc6WrlWithCoarsePowerGating: Doubling WRL only when CPG is enabled */
> -	if (IS_SKYLAKE(dev) && !((IS_SKL_GT3(dev) || IS_SKL_GT4(dev)) &&
> -				 IS_SKL_REVID(dev, 0, SKL_REVID_E0)))
> +	if (IS_SKYLAKE(dev))
>   		I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 108 << 16);
>   	else
>   		I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16);