[Intel-gfx] [PATCH 17/18] drm/i915/skl: Implement WaCcsTlbPrefetchDisable:skl

[Nick Hoath]

On 09/02/2015 19:33, Damien Lespiau wrote:
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>

Reviewed-by: Nick Hoath <nicholas.hoath at intel.com>

> ---
>   drivers/gpu/drm/i915/i915_reg.h         | 1 +
>   drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++++
>   2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 610fcd4..090ddd7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6216,6 +6216,7 @@ enum skl_disp_power_wells {
>
>   #define GEN9_HALF_SLICE_CHICKEN5	0xe188
>   #define   GEN9_DG_MIRROR_FIX_ENABLE	(1<<5)
> +#define   GEN9_CCS_TLB_PREFETCH_ENABLE	(1<<3)
>
>   #define GEN8_ROW_CHICKEN		0xe4f0
>   #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index db83baf..57432ca 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -928,6 +928,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
>   	/* WaDisablePartialResolveInVc:skl */
>   	WA_SET_BIT_MASKED(CACHE_MODE_1, GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE);
>
> +	/* WaCcsTlbPrefetchDisable:skl */
> +	WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,
> +			  GEN9_CCS_TLB_PREFETCH_ENABLE);
> +
>   	return 0;
>   }
>
>